The present invention relates to communications networks, and more particularly to detecting the validity of scrambled SONET/SDH serial data streams transmitted between integrated circuit devices used in such networks.
Demand for high performance communication networks capable of transporting multiple types of data, such as text, audio and video data, is on the rise. To carry greater amounts of data over existing communication channels, such as fiber-optic communication channels, network carriers are increasingly using high bandwidth technologies, such as SONET optical carrier (OC) level 48 and OC level 192. Such communication networks rely upon high-performance Add/Drop multiplexers, digital cross connect switches, and multi-service provisioning platforms. To fully utilize the high bandwidth capability of existing fiber optic communication channels, typically data is transmitted through such channels using some form of multiplexing. One form of multiplexing used is called Time Division Multiplexing (TDM).
In accordance with the TDM technique, data bits associated with different channels are interleaved in the time domain to form a composite bit stream. In other words, TDM puts multiple lower rate data streams into a single higher rate data stream. The block that combines the lower rate streams at the source (transmitting) end of a communication link is known as a multiplexer. The multiplexer receives the input streams from N lower rate channels, breaks each stream into segments, also known as grains, and assigns the grains to a higher rate channel in a rotating, repeating sequence. The frequency of the higher rate channel is N times the frequency of the lower rate channels. At the receiving end of the link, the received streams are separated out by means of a block called a demultiplexer. The demultiplexer regenerates each lower rate stream by extracting one grain from every N grains of the higher rate stream using the same rotating, repeating sequence used by the multiplexer. A two-way communication link requires a multiplexer/demultiplexer at each end of the link.
FIG. 1 is a simplified high-level block diagram of an add/drop multiplexer 10, as known in the prior art. Add/drop multiplexer 10 is shown as including line cards 12, 14, 16 which transmit and receive SONET OC-48 or OC-192 or similar SDH data streams, described below, via optical or electrical communication links. The line cards contain framers which terminate the section portion of the transport overhead of the received SONET/SDH frames, described further below. Each link may include a number of physical links. Line card 12 is shown as including 4 links each configured to receive and transmit an OC-48 data stream. Line card 14 is shown as including 2 links each configured to receive and transmit an OC-192 data stream. Line card 16 is shown as including 8 links each configured to receive and transmit an OC-48 data stream. After terminating the SONET section overhead on received data, each line card forwards its processed data to a switch 18, which may be a switch fabric, over electrical or optical interconnect links.
Switch 18 frames, aligns and descrambles the data it receives from the line cards. Switch 18 subsequently decomposes the grain groups on each stream into grains, and rearranges and adds and/or drops the various grains according to user settings, thus forming new grain groups. The new grain groups are then forward to a transmitter logic within the switch which among other things, scrambles and serializes the data, and transmits this data out to the line cards using other links (not shown).
Two commonly known standards referred to as synchronous optical network (SONET) and Synchronous Digital Hierarchy (SDH) define a synchronous frame structure for transmitting signals using time division multiplexing. The basic building block of a SONET frame, commonly referred to as synchronous transport signal-1 (STS-1) includes 810 bytes that are transmitted every 125 μsec. Therefore a SONET channel carrying STS-1 frames (i.e., an STS-1 pipe) has a bit rate of 51.84 Mb/s, which has a corresponding optical signal referred to as OC-1. The SDH standard defines a similar signal hierarchy. All STS-1 signals repeatedly send a frame of information every 125 μsec, regardless of the rate of the multiplexed signal that contains them. Both the SONET and SDH standards require the use of the same framing pattern and scrambling algorithm.
Many STS-1 pipes may be time division multiplexed to achieve higher bandwidths. For example, 3 STS-1 pipes may be multiplexed to form an STS-3 frame, thus to achieve a bit rate of 155.52 Mb/s. Using TDM, many STS-1 data streams can be combined and processed as a single data stream. In an add/drop multiplexer, multiple higher rate data streams can be decomposed into their constituent STS-1 streams which can then be recombined into new higher rate data stream for transport elsewhere in the communications network.
A standard SONET STS-1 frame includes 3-bytes of transport overhead (TOH) followed by 87-bytes of the synchronous payload envelope (SPE), collectively referred to as a row. This format is repeated 9 times to form a total of 90×9 bytes containing 27 bytes of TOH spread over 9 rows and 783 bytes of SPE spread over 9 rows. The first two bytes of the first row of a frame identify the frame boundary. These bytes are referred to as the A1 and A2 bytes. The contents of the A1 and A2 bytes are the 8 bit values F6h and 28h respectively. The h suffix denotes that these values are written in hexadecimal notation, or are of base 16 instead of decimal notation, or base 10. When, for example, 48 STS-1 frames are multiplexed to form an STS-48 frame, the resulting STS-48 frame includes an A1 byte from each of the 48 STS-1 frames followed by the A2 byte of each of the 48 STS-1 frames, and that is followed by the remaining bytes of each of the 48 STS-1 frames. In an STS-1 frame, the J0 byte follows the A1 and A2 bytes. When multiple STS-1 frames are multiplexed together to form a higher rate frame, the first J0 byte retains the J0 designation while the remaining J0 bytes are referred to as the Z0 bytes. For example, in an STS-48 framed composed of 48 STS-1s frames, at the start of the STS-48 frame, 48 A1 bytes are followed by 48 A2 bytes followed by 1 J0 byte followed by 47 Z0 bytes. The contents of the J0/Z0 bytes are user defined and care must be taken in ensuring these bytes contain sufficient bit transitions so as to not create data stream recovery problems at the receiver. This will be discussed in more detail shortly.
SONET/SDH frames, when transmitted serially, are sent in byte order with the most significant bit of each byte transmitted first. To randomize the data for serial transmission, the frame bytes, except the A1, A2, J0/Z0 bytes, are scrambled using a polynomial defined by the SONET standard. The physical interfaces to the transmission medium, for both electrical or optical transmission mediums, require a non-return to zero coding technique. This is because data recovery at the receiver is often performed by a phase locked loop (PLL), or other control locked-loops, which requires regular bit transitions in the received data stream in order to properly recover the data bits in the stream. Scrambling the frames provides sufficient bit transitions in the serial stream to enable the successful recovery of the data.
The A1 and A2 bytes contain sufficient bit transitions, so they do not need to be scrambled and are left unscrambled to allow the receivers to find the start of frame in the data stream. In accordance with the SONET and SDH standards, J0/Z0 bytes are not scrambled. Therefore, users must ensure that the content of these bytes do not contain long sequences of 1 or 0 bits. Equipment compliant with SONET/SDH standards must be capable of receiving a stream of at least 72 consecutive identical digits (CID) or bits without degrading the ability of the PLL to recover subsequent bits. If greater than 72 consecutive identical bits are received by the PLL, the frequency of the PLL may wander, thus increasing the probability that the PLL makes errors while recovering bits from the data stream after transitions resume.
Receivers disposed in SONET/SDH equipment must identify the start of frame of the signals they process so that subsequent bytes within the frame can be identified by their position relative to the start of frame. This is done by identifying the A1/A2 byte pattern in the received data stream using a simple matching technique. SONET/SDH standards require that the start of frame pattern to be found in 2 subsequent frames, each exactly 125 μsec apart, before the framer declares that it has found the frame alignment of the data stream. Once the framer has declared frame alignment, the receiver then unscrambles all the bytes in the frame that follow the A1, A2, J0/Z0 bytes in accordance with the SONET and SDH standards. Similarly, when a framer detects that the A1/A2 boundary is no longer in its expected location, a loss of frame (LOF) condition is declared by the framer once the condition persists for 3 consecutive frames. Framers therefore require a minimum of 375 μsecs (3 frame times) of elapsed time to declare LOF. The LOF condition remains in place until the framer reframes to the incoming signal. As a consequence of declaring LOF, framers may optionally insert an Alarm Indication Signal or AIS pattern into the frame before it is forwarded for further processing. The AIS pattern is created by overwriting the entire frame, except for the A1 and A2 bytes, with the byte value FFh, which corresponds to all 1s in every bit position within the byte. The insertion of the AIS pattern indicates to downstream processing elements that an upstream framer has detected a problem in the data. AIS insertion is done on the unscrambled data stream. Once scrambled for transmission over a serial link to another processing element within the system, the FFh content is converted into a transition rich data pattern, as required for proper data recovery by the downstream device.
In order to determine if a receiver is properly capturing an incoming data stream, the SONET and SDH specifications include a B1 byte in the TOH of each STS-1 frame. The B1 byte contains a bit interleaved parity indication (BIP-8) calculated using the contents of the previous frame. At a transmitter, an 8-bit code is computed using all bits of the previous scrambled data frame and is placed in byte B1 of the current data frame before the current data is scrambled. The BIP-8 code is calculated in such a manner that the first bit of the code provides even parity over the first bit of all 8-bit sequences in the previous frame, the second bit provides even parity over the second bit of all 8-bit sequences within the previous frame, etc. Even parity is generated by setting the BIP-8 bits so that there is an even number of 1s in each monitored partition of the signal. By calculating the value of the B1 byte from the data carried by the frame and comparing it to the actual B1 byte also carried by the frame, the receiver determines whether bit errors occurred in the frame. This method of bit error detection provides an indication of the quality of the received data stream. It is effective at detecting single or an odd number of bit errors in each monitored partition of the signal. It cannot however detect an even number of errors within a partition. This is acceptable since under normal circumstances, few bit errors are seen on SONET streams operating over properly functioning equipment, whereas when equipment fails, most often the failures are catastrophic and may be detected by such methods as LOF, and B1 errors.
TDM switches, of which SONET/SDH switches are a subset, are commonly used to cross-connect lower rate bit streams that are disposed in a higher rate bit stream. The collection of lower rate streams (i.e. grains) that form a higher rate stream is referred to as a grain group. A grain group therefore includes a fixed number of grains.
FIG. 2 illustrates aligned TDM channels that are ready for switching. Assume that N represents the number of STS-1 frames that are multiplexed into a higher rate frame and that each grain group includes G grains. In TDM systems, data is multiplexed according to its location in time. Each data source in a system is aligned to some signal. In SONET, the alignment signal is the 8 kHz clock and the start of frame boundary. A stream within a higher rate stream is identified by its offset from the alignment signal, with an individual datum recurring every G clock ticks. The grain group size G defines the granularity of switching possible in a particular TDM system. Therefore, a data value from a given channel is present every G clock cycles, often referred to as a time slot. For example, one sample from a STS-1 signal forms each grain of a SONET system. An STS-48 signal is formed from 48 such grains, and therefore, the grain group size is 48.
FIG. 3 illustrates an exemplary TDM switching 30, as known in the prior art. In this example, the TDM switch is shown as having n input ports and n output ports (N×N). In FIG. 3, each byte is labeled with a letter representing the input port and a number representing the byte position at the port. As is seen from the output data, bytes may be reordered to any position, or may be multicast to several ports (or a single port). Also, some bytes may be dropped. In output Port Q all the grains, except the second grain, are shown as coming from a single input port. FIG. 3 shows switching of grains within one grain group. The same switching of grains within a grain group is repeated for all grain groups.
Referring to FIG. 1, the high speed serial links coupled between lines cards 12, 145, 16 may generate a significant amount of crosstalk. As is known, crosstalk is a disturbance caused by the electric or magnetic fields of one signal affecting an adjacent signal. Crosstalk degrades the quality of the impacted signal. Under some circumstances, the impacted signal may be rendered unintelligible. To minimize crosstalk, careful design considerations are often taken into account.
Communications systems containing sub-systems and integrated circuit devices are commonly interconnected via point to point, high speed serial interconnect links, such as that shown in FIG. 1. Because such communication systems often include a large number of high speed serial interconnects that are run in parallel over printed circuit boards and through connectors, a significant potential for crosstalk exists in such systems, as described further below.
Serial link receivers have relatively high sensitivity. This enables various components of a communication system to communicate at high data rates even though they may be physically located on separate circuit boards, e.g., 1 meter or more apart. When interconnect links fail for mechanical or electrical reasons, or due to human action, such as when a circuit board is removed from the system inadvertently or on purpose, the receiver that is disconnected from its transmitter becomes much more susceptible to the crosstalk present in the system. In such cases, the receiver remains attached to the interconnect link but the link is severed at or near the transmitter, leaving the link electrically open ended with no signal driving it. This electrically floating link may act as an antenna and pick up crosstalk from adjacent sources. Therefore, crosstalk occurs when data transitions on an aggressor link (i.e., the link sourcing the data transitions) get capacitively or electromagnetically coupled onto another link. The crosstalk may create data on the open ended link very similar to the data the link originally carried before the transmitter was removed. If the crosstalk is coupled tightly to the receiver of the faulty link, the crosstalk would have dc balance and transition density properties similar to the aggressor SNRZ SONET/SDH data link.
Crosstalk typically causes distortion in the signal coming from the link's intended source. Various design techniques are used to minimize the impact that this distortion has on the receiver. However, if an interconnect link is disconnected from its driver, i.e. is floating, only the crosstalk is seen by the receiver. The receiver may process the crosstalk signal as if it originated from the intended driver.
Because a crosstalk signal is relatively weak, and because only the data transitions are coupled from the aggressor—strings of consecutive bits do not couple well via crosstalk—the received crosstalk signals represent a distorted version of the original data stream. In the absence of any input signal, receivers may report a default received bit of logic one or zero continuously until a signal is applied. The value of the default typically varies from receiver to receiver and is dependent on the process variations within the receiver that occur during manufacturing. As a result, when long strings of identical bits are present in the aggressor data stream, no crosstalk occurs and the receiver reports its default bit value if no other signal is received by the receiver.
Due to limitations that prevent the aggressor data stream from coupling nearly perfectly to the susceptible receiver, the received data stream may contain statistical characteristics similar to a valid signal, however, the crosstalk data may not contain a balance of 1 and 0 bits over the short term or long term, and it may contain an excessive number of consecutive identical digits (CID). Such data streams are corrupted and may be detected as such by the frame identification circuitry coupled to the serial receivers.
In accordance with the SONET and SDH standards, after a framer has achieved frame alignment based on identifying the A1A2 boundary in the SONET frame, the framer will declare a loss of frame after 3 consecutive framing sequences do not appear at the 125 μsec frame interval. Consequently, the framer declares a loss of frame and substitutes a loss of frame data pattern (continuous 1's) for the erroneous data stream. The length of time between the actual loss of a valid data stream due and the detection of the loss of frame is 375 μsec or longer. During this time, a large number of data bits, e.g., tens of thousands of data bits, that may not be DC balanced or may contain long strings of CIDs may be forwarded to a switching device if the reason for the loss of frame was due to the transmitter failing or being removed from the system and crosstalk replaced the legitimate data source. Grains from the faulty stream may then be combined with valid grains from other ports to form a new egress data stream. If the egress stream contains sufficient DC imbalance or excessive CID's, the receiver of the egress stream may not be able to recover the entire data stream. Therefore, due to one or more faulty ingress data stream, grains that are part of valid data stream, may be corrupted.
For example, referring to FIG. 1, assume that the line card which is driving port P is inadvertently disconnected from the system. The receiver on port P of the cross-connect begins seeing crosstalk that contains long strings of CIDs. Output port Q is shown as containing grains mainly from input port P and one grain from input port R. A downstream receiver connected to output port Q may begin making data recovery errors when it encounters the long strings of CIDs. As a result, both valid data grains originating from input port R as well as the crosstalk from port P cannot be accurately recovered from the data stream by the receiver receiving data from output port Q. This is generally considered to be unacceptable performance in the system since faults in the system should not corrupt portions of the system that are otherwise operating properly. In general, the more rapidly a faulty data stream is detected, the less impact the faulty data may have on valid data streams and downstream devices.
Analog signal strength detection circuits which rely on the signal strength of a received signal in order to determine whether the signal is valid, are known. Such circuits, however, may misinterpret crosstalk signal as a valid signal if the crosstalk signal has a relatively high signal strength. One may increase the minimum signal strength threshold in an analog signal detection solution to help differentiate between valid and invalid signals and to reject crosstalk at the receiver. This however tends to limit the maximum interconnect link span within the system since a threshold detector will reject even a valid signal if the magnitude is insufficient at the receiver. The tradeoff between the maximum distance a signal can be propagated in the system and the effectiveness of an analog signal detection circuit may thus be unacceptable. Also, the range of signal strength of valid signals and the range of signal strength of crosstalk signals may overlap, particularly under conditions where an interconnect link is disconnected at the transmitter and leaves the link floating, thus effectively creating an antenna which is quite sensitive to crosstalk.
Another technique used to handle floating interconnects, is to use pull up resistors at the receiver. When a link is disconnected from its driver, the pull up prevents the link from floating and forces it to a supply voltage rail. This has the effect of forcing the receiver to detect a continuous logic 1 or 0 on the link. A digital circuit monitoring the bit stream could be used to detect this CID condition and force the receiver out of frame. This would produce the desired result of eliminating the faulty data from the system. However pull up resistors often reduce the maximum interconnect link span within the system because the transmitting device must produce a signal with sufficient strength at the receiving end to overcome the effect of the pull up resistor during normal operation. This requires that a signal of greater magnitude be present at the receiver than would otherwise be necessary. Another disadvantage of this approach is the relatively long delay time required to achieve a static value at the output of the detector. This delay may be too long to prevent the undesirable effects to the downstream data processing.
Another technique is to incorporate hysteresis to the input receiver characteristics. While this does not give rise to duty cycle distortion and hence jitter, it complicates the signal path, which in turn, poses difficulties for the designers of such circuits as the data rate approaches the limits of the available technology.